Moore's Law and the future of computing

Moore's Law is the observation that over the history of computing hardware, the number of transistors on integrated circuits doubles approximately every two years. The period often quoted as "18 months" is due to Intel executive David House, who predicted that period for a doubling in chip performance (being a combination of the effect of more transistors and their being faster). 

The ITRS (International Technology Roadmap for Semiconductors) has given a common vision on electronics evolution. Since 2007 it has addressed the concept of functional diversification under the title “More than Moore” (MtM). This concept addresses an emerging category of devices for non-digital functionalities (e.g., RF communication, power control, passive components, sensors, actuators) to migrate from the system board-level into a particular package-level (SiP) or chip-level (SoC) system solution. 

It should be emphasized that “More than Moore” (MtM) technologies do not constitute an alternative or even a competitor to the digital trend as described by Moore’s Law. In fact, it is the heterogeneous integration of digital and non-digital functionalities into compact systems that will be the key driver for a wide variety of application fields. 

The ITRS provides a very comprehensive analysis of the perspective for Moore’s Law when looking towards 2020 and beyond. The analysis can be roughly segmented into two trends: More Moore (MM) and More than Moore (MtM).

More Moore
As we look at the years 2020–2025, we can see that the physical dimensions of CMOS manufacture are expected to be crossing below the 10 nanometer threshold. It is expected that as dimensions approach the 5–7 nanometer range it will be difficult to operate any transistor structure that is utilizing the metal-oxide semiconductor (MOS) physics as the basic principle of operation. Of course, we expect that new devices, like the very promising tunnel transistors, will allow a smooth transition from traditional CMOS to this new class of devices to reach these new levels of miniaturization. And 3D transistors. allow the use of multiple (i.e., more than 2) logic states in any given and finite location, which evokes the magic of “quantum computing” looming in the distance.

by the year 2025, we will have :

-  4Tb Flash multi-level cell (MLC) memory

·         - There will be ~100 billion transistors per microprocessing unit (MPU)

·         - 1TB RAM Memory will cost less than $100